Re: mainframe performance, was Is a RISC chip more expensive?
- From: Stephen Fuld <S.Fuld@xxxxxxxxxxxxxxxxxxxx>
- Date: Thu, 30 Aug 2007 16:16:28 GMT
John L wrote:
So you're probably right, a high end x86 will run your random CI assume you are saying that the Z series is faster. And if your first sentence is true, then presumably it must be the microcode assists that tip the balance?
program faster than a z9 will, but set both up to run Linux with an
Apache web server with java applets and a SQL back end, servicing
requests over multiple gigabit ethernets, and I suspect I know which
one will be faster.
It's the whole system design. Web servers are transaction servers,
and mainframe vendors have been figuring out how to make transactions
run fast since the SABRE project over 40 years ago. It's not just one
thing, it's the whole system design that has very fast I/O without the
bottlenecks you have on PCs (e.g., SCSI or ATA disk controllers that
can only run one of their disks at a time)
For over the last decade, all IBM systems have used SCSI disks. Yes, there is a controller that translates ECKD into SCSI commands, but that adds latency to the I/O. Yes, desktop PCs typically can do only one I/O per disk controller at a time, but PC servers can easily use the same SCSI disks as an IBM mainframe does and even do it without the additional latency. The latency on a PCI SCSI controller is far less than that of an IBM ECKD controller, and they can easily handle multiple I/Os per controller.
>, caches and TLBs that let
all those processors run without stepping on each other,
OK, now we are getting into it. What is it about the design of the caches and TLBs in the Z series that allows this and is not available on X 86 systems?
> and microcode
assists for the few bits that might be CPU bound.
The general consensus that led to RISC systems was that a sequence of RISC instructions was at least as fast, and usually faster than a heavily microcoded instruction for accomplishing complex tasks. So what is it about the microcode assists that changes this consensus?
--
- Stephen Fuld
(e-mail address disguised to prevent spam)
.
- Follow-Ups:
- Re: mainframe performance, was Is a RISC chip more expensive?
- From: Anne & Lynn Wheeler
- Re: mainframe performance, was Is a RISC chip more expensive?
- From: John L
- Re: mainframe performance, was Is a RISC chip more expensive?
- References:
- Is a RISC chip more expensive?
- From: mike3
- Re: Is a RISC chip more expensive?
- From: Quadibloc
- Re: mainframe performance, was Is a RISC chip more expensive?
- From: John L
- Re: mainframe performance, was Is a RISC chip more expensive?
- From: Stephen Fuld
- Re: mainframe performance, was Is a RISC chip more expensive?
- From: John L
- Is a RISC chip more expensive?
- Prev by Date: Re: Tilera: how exciting?
- Next by Date: Re: Is a RISC chip more expensive?
- Previous by thread: Re: mainframe performance, was Is a RISC chip more expensive?
- Next by thread: Re: mainframe performance, was Is a RISC chip more expensive?
- Index(es):
Relevant Pages
|
