Re: Is a RISC chip more expensive?



Benny Amorsen wrote:
"SS" == Stephen Sprunk <stephen@xxxxxxxxxx> writes:

SS> Modern x86 chips are RISCs with a decoder slapped on the front
SS> that translates CISC code. You are, in essence, asking if RISC
SS> chips are more expensive than RISC chips.

Is that not how microcoded CISC always worked?
..
Not *quite*.

A RISC computer still has a conventional computer instruction set,
except that address calculation is separated out from the load/store
instructions, and only register-register versions of the arithmetic
operations are provided.

Microcode contains instructions to do things like "move contents of
this register to the address bus" and "move incoming data from data
bus to this register". It's specifically designed for implementing an
instruction set, not writing programs directly.

Modern x86 chips - and, in fact, even a lot of modern RISC chips -
decode the incoming instruction stream into something that isn't a lot
like either microcode or RISC. The closest parallel is instead to the
instructions used with VLIW machines.

Instructions are taken, converted into the internal operations that
are needed to perform them, but unlike in the case of microcode,
operations belonging to several different instructions are performed
at the same time. The internal operations, though, don't handle the
program counter, which the instruction decoder manages internally,
they just do the arithmetic and the data movement, whereas microcode
handles everything.

This is what is known as a "decoupled microarchitecture".

John Savard

.



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