Re: Architectures with not atomic stores/loads



Chris Thomasson wrote:

"Nick Maclaren" <nmm1@xxxxxxxxxxxxx> wrote in message
news:f8itko$ik4$1@xxxxxxxxxxxxxxxxxxxxxxx

In article <46ACF519.EE5ED4EB@xxxxxxxxxxxxxxxxxx>,
"Eric P." <eric_pattison@xxxxxxxxxxxxxxxxxx> writes:
|> David Gay wrote:
|> > Dmitriy V'jukov <dvyukov@xxxxxxxxx> writes:
|> >
|> > > Are there any modern widespread architectures on which loads or
stores
|> > > to aligned word-sized locations are not atomic?
|> >
|> > Pretty much all the 8-bit processors, I'd say. And yes, they are
|> > widespread, have C compilers, and simple operating systems. Though
|> > they are unlikely to be in any SMP-like configuration ;-)
|>
|> I don't think that is sufficient.
|> For 'word tearing' to be possible it must have:
|> - a bus that is smaller than the 'word' size so that it
|> requires multiple bus cycles to transfer a 'word'.
|> Usually this is connected to a smaller width memory bank.
|> - the bus ownership must be relinquished between multi-cycle
|> transfers to a different master.

Nope. You could get it on the System/370, with a 32-bit word and
a 64-bit 'bus', in several different ways. And it came in several
SMP configurations.

Yup. I believe a principals of operation manual from IBM stated this under
one of the appendices for their example of multiprocessing free-pool (e.g.,
lock-free stack) implementation examples.

You don't happen to have a reference handy do you?
I'd like to read this for myself. It'll probably be online somewhere.

Eric

.

Relevant Pages

  • Re: Architectures with not atomic stores/loads
    ... |>>> Are there any modern widespread architectures on which loads or stores ... |>> widespread, have C compilers, and simple operating systems. ... |> requires multiple bus cycles to transfer a 'word'. ...
    (comp.arch)
  • Re: Architectures with not atomic stores/loads
    ... |>>> Are there any modern widespread architectures on which loads or stores ... |> requires multiple bus cycles to transfer a 'word'. ...
    (comp.arch)
  • Re: Architectures with not atomic stores/loads
    ... |>>> Are there any modern widespread architectures on which loads or stores ... |> For 'word tearing' to be possible it must have: ... |> requires multiple bus cycles to transfer a 'word'. ...
    (comp.arch)
  • Re: Architectures with not atomic stores/loads
    ... |>>> Are there any modern widespread architectures on which loads or stores ... |> For 'word tearing' to be possible it must have: ... |> requires multiple bus cycles to transfer a 'word'. ...
    (comp.arch)