Re: IA 64 Assembly

cperfumo@xxxxxxxxx wrote:
Hi all.
I want to define an asm inline function to read L1-data cache misses
in ia64. I saw in the official manual that the event is possible to
read but I can't figure out what assembly to write.

I'm not an expert, but did ask someone who could be considered such.
Their reply was if you want to read a performance counter configured
to read L1-data cache misses you need to use the perfmon interface
(under Linux at least) as the PMC registers are not writable at pl3
and the counters (PMD) are not readable at pl3 by default. So, no use
of just inline assembly.

The person I asked went on to say "with perfmon, when you are
self-monitoring, you can issue a read of a PMD using a single mov
rXX=pmd[y] inline instruction."

hth,

rick jones
--
firebug n, the idiot who tosses a lit cigarette out his car window
these opinions are mine, all mine; HP might not want them anyway... :)
feel free to post, OR email to rick.jones2 in hp.com but NOT BOTH...
.