comp.arch

• Date Index

---

• Help me, please (Stallings), Nothingman
• Ph.D. student position 'Computer Systems Architecture' (University of Amsterdam), Andy Pimentel
• Superconductors and computing, kenney
  • Re: Superconductors and computing, John Dallman
    • Re: Superconductors and computing, Rob Warnock
      • Re: Superconductors and computing, John Dallman
    • Re: Superconductors and computing, Quadibloc
  • Re: Superconductors and computing, Del Cecchi
    • Re: Superconductors and computing, kenney
      • Re: Superconductors and computing, Del Cecchi
      • Re: Superconductors and computing, kenney
  • Re: Superconductors and computing, jacko
• Question about composability of locks, YUAN, Nan
  • Re: Question about composability of locks, Joe Seigh
    • Re: Question about composability of locks, YUAN, Nan
      • Re: Question about composability of locks, Chris Thomasson
      • Re: Question about composability of locks, Joe Seigh
• Microprocessor with best known debugging features?, drop669
  • Re: Microprocessor with best known debugging features?, Eric Smith
  • Re: Microprocessor with best known debugging features?, John Dallman
    • Re: Microprocessor with best known debugging features?, drop669
      • Re: Microprocessor with best known debugging features?, Kai Harrekilde-Petersen
  • Re: Microprocessor with best known debugging features?, Gavin Scott
    • Re: Microprocessor with best known debugging features?, drop669
    • Re: Microprocessor with best known debugging features?, David Kanter
• 100 People Images, architecturalimages
• Uses for IPF/32b PPC style segments?, Paul A. Clayton
• running programs on a multicore system, Vasanth Venkatachalam
  • Re: running programs on a multicore system, Nick Maclaren
  • Re: running programs on a multicore system, Wes Felter
  • Re: running programs on a multicore system, IndianTechie
• Re: Photonic Equivalent of "Leakage Current"?, kenney
• Processor definitions, kenney
  • Re: Processor definitions, Wilco Dijkstra
• Re: New AMD IOMMU Spec (1.2), Eric Smith
  • Re: New AMD IOMMU Spec (1.2), Rob Warnock
    • Re: New AMD IOMMU Spec (1.2), Jan Vorbrüggen
• SPEC200x L1 I-Cache hit rates on current x86-CPUs, Elcaro Nosille
  • Re: SPEC200x L1 I-Cache hit rates on current x86-CPUs, kenneth . hoste
• Research Opportunity in India, Sri.speech
• Re: Alternatives to ROM. Magnetic vs. Electric, nobody@xxxxxxxxxxx
  • Re: Alternatives to ROM. Magnetic vs. Electric, Casper H . S . Dik
  • FDIV bug (Was: Re: Alternatives to ROM. Magnetic vs. Electric), Terje Mathisen
• Waht do you think about..., MAROMANU80@xxxxxxxxx
• Help please!!, kicko
• FBDIMM vs DIMM - any compatibility?, robr
  • Re: FBDIMM vs DIMM - any compatibility?, Paul Gotch
    • Re: FBDIMM vs DIMM - any compatibility?, Peter Dickerson
  • Re: FBDIMM vs DIMM - any compatibility?, Thomas Womack
    • Re: FBDIMM vs DIMM - any compatibility?, Anton Ertl
      • Re: FBDIMM vs DIMM - any compatibility?, Niels Jørgen Kruse
      • Re: FBDIMM vs DIMM - any compatibility?, Anton Ertl
      • Re: FBDIMM vs DIMM - any compatibility?, davewang202
• Canceled Niagara-like AMD project, Anton Ertl
  • Re: Canceled Niagara-like AMD project, Del Cecchi
    • Re: Canceled Niagara-like AMD project, Nick Maclaren
      • Re: Canceled Niagara-like AMD project, Anton Ertl
      • Re: Canceled Niagara-like AMD project, Nick Maclaren
      • Re: Canceled Niagara-like AMD project, Thomas Womack
      • Re: Canceled Niagara-like AMD project, Nick Maclaren
      • Re: Canceled Niagara-like AMD project, Klaus Fehrle
      • Re: Canceled Niagara-like AMD project, David Kanter
      • Re: Canceled Niagara-like AMD project, Niels Jørgen Kruse
      • Re: Canceled Niagara-like AMD project, Anton Ertl
• Gates that are 4-5 nanometers tall?, Chris Thomasson
  • Re: Gates that are 4-5 nanometers tall?, Del Cecchi
    • Re: Gates that are 4-5 nanometers tall?, Eric Smith
      • Re: Gates that are 4-5 nanometers tall?, Del Cecchi
    • Re: Gates that are 4-5 nanometers tall?, Chris Thomasson
      • Re: Gates that are 4-5 nanometers tall?, Del Cecchi
• Procedure entry cache, Paul A. Clayton
  • Re: Procedure entry cache, Anton Ertl
    • Re: Procedure entry cache, Paul A. Clayton
      • Re: Procedure entry cache, Mark Smotherman
      • Re: Procedure entry cache, Paul A. Clayton
      • Re: Procedure entry cache, Paul A. Clayton
      • Re: Procedure entry cache, Paul A. Clayton
• Cache idea, Paul A. Clayton
• How to display on UP3's LCD, SANJEEV KUMAR DHABRE
• ISA design styles, Jules
  • Re: ISA design styles, Torben Ægidius Mogensen
    • Accumulator machines (was: ISA design styles), Anton Ertl
      • Re: Accumulator machines (was: ISA design styles), Nick Maclaren
      • Re: Accumulator machines (was: ISA design styles), Wilco Dijkstra
      • Re: Accumulator machines (was: ISA design styles), Anton Ertl
      • Re: Accumulator machines (was: ISA design styles), Wilco Dijkstra
      • Re: Accumulator machines (was: ISA design styles), Anton Ertl
      • Re: Accumulator machines (was: ISA design styles), Tim McCaffrey
      • Re: Accumulator machines (was: ISA design styles), Anton Ertl
      • Re: Accumulator machines (was: ISA design styles), Tim McCaffrey
      • Re: Accumulator machines (was: ISA design styles), toby
      • Re: Accumulator machines (was: ISA design styles), Mark Smotherman
      • Re: Accumulator machines (was: ISA design styles), Rob Warnock
      • Re: Accumulator machines, Terje Mathisen
    • Re: ISA design styles, Stephen Fuld
      • Re: ISA design styles, Torben Ægidius Mogensen
      • Re: ISA design styles, Rob Warnock
      • Re: ISA design styles, kenney
      • Re: ISA design styles, Torben Ægidius Mogensen
• Re: Question on LL-SC instruction and sync behavior in hardware, Chris Thomasson
• ISA quickie survey: min/max instructions?, Andrew Reilly
  • Re: ISA quickie survey: min/max instructions?, robertwessel2@xxxxxxxxx
    • Re: ISA quickie survey: min/max instructions?, Stephen Fuld
  • Re: ISA quickie survey: min/max instructions?, already5chosen
  • Re: ISA quickie survey: min/max instructions?, Terje Mathisen
    • Re: ISA quickie survey: min/max instructions?, Torben Ægidius Mogensen
      • Message not available
      • Re: ISA quickie survey: min/max instructions?, Andrew Reilly
      • Re: ISA quickie survey: min/max instructions?, Stefan Bieschewski
      • Re: ISA quickie survey: min/max instructions?, Niels Jørgen Kruse
      • Re: ISA quickie survey: min/max instructions?, Tim McCaffrey
      • Re: ISA quickie survey: min/max instructions?, already5chosen
      • Re: ISA quickie survey: min/max instructions?, Torben Ægidius Mogensen
      • sort instructions (was: ISA quickie survey: min/max instructions?), Anton Ertl
    • Re: ISA quickie survey: min/max instructions?, already5chosen
      • Re: ISA quickie survey: min/max instructions?, Terje Mathisen
      • Re: ISA quickie survey: min/max instructions?, already5chosen
  • Re: ISA quickie survey: min/max instructions?, Michel Hack
    • Re: ISA quickie survey: min/max instructions?, Nick Maclaren
• Re: superscalar and superpipelined, Yogesh
• Re: Historical question: first reference to "chip"?, Don Lindsay
• Re: Beyond multicore, TTK Ciar
  • Re: Beyond multicore, Nick Maclaren
• Advantages of Parallel Hz - a better approach, Guy Macon
  • Re: Advantages of Parallel Hz - a better approach, Radium
• Documentation for POPCNT/LZCNT Instructions, dave
  • Re: Documentation for POPCNT/LZCNT Instructions, Spoon
    • Re: Documentation for POPCNT/LZCNT Instructions, dave
• Software Optimization Guide for AMD Family 10h Processors, Klaus Fehrle
  • Re: Software Optimization Guide for AMD Family 10h Processors, Terje Mathisen
    • Re: Software Optimization Guide for AMD Family 10h Processors, Klaus Fehrle
      • Re: Software Optimization Guide for AMD Family 10h Processors, Terje Mathisen
    • Re: Software Optimization Guide for AMD Family 10h Processors, Ken Hagan
      • Re: Software Optimization Guide for AMD Family 10h Processors, Terje Mathisen
  • Re: Software Optimization Guide for AMD Family 10h Processors, Anton Ertl
    • Re: Software Optimization Guide for AMD Family 10h Processors, Klaus Fehrle
    • Re: Software Optimization Guide for AMD Family 10h Processors, Klaus Fehrle
      • Re: Software Optimization Guide for AMD Family 10h Processors, Greg Lindahl
      • Re: Software Optimization Guide for AMD Family 10h Processors, Klaus Fehrle
      • Re: Software Optimization Guide for AMD Family 10h Processors, Greg Lindahl
      • Re: Software Optimization Guide for AMD Family 10h Processors, Klaus Fehrle
      • Re: Software Optimization Guide for AMD Family 10h Processors, Thomas Womack
      • Re: Software Optimization Guide for AMD Family 10h Processors, Klaus Fehrle
      • Re: Software Optimization Guide for AMD Family 10h Processors, Phillip Fayers
      • Re: Software Optimization Guide for AMD Family 10h Processors, Nick Maclaren
      • Re: Software Optimization Guide for AMD Family 10h Processors, Phillip Fayers
      • Re: Software Optimization Guide for AMD Family 10h Processors, Greg Lindahl
      • Re: Software Optimization Guide for AMD Family 10h Processors, David Kanter
      • Re: Software Optimization Guide for AMD Family 10h Processors, Klaus Fehrle
      • Re: Software Optimization Guide for AMD Family 10h Processors, David Kanter
      • Re: Software Optimization Guide for AMD Family 10h Processors, David Kanter
      • Re: Software Optimization Guide for AMD Family 10h Processors, Klaus Fehrle
      • Re: Software Optimization Guide for AMD Family 10h Processors, David Kanter
      • Re: Software Optimization Guide for AMD Family 10h Processors, Klaus Fehrle
      • Re: Software Optimization Guide for AMD Family 10h Processors, Nick Maclaren
      • Re: Software Optimization Guide for AMD Family 10h Processors, Klaus Fehrle
      • Re: Software Optimization Guide for AMD Family 10h Processors, Phillip Fayers
      • Re: Software Optimization Guide for AMD Family 10h Processors, Klaus Fehrle
      • Re: Software Optimization Guide for AMD Family 10h Processors, Bernd Paysan
      • Re: Software Optimization Guide for AMD Family 10h Processors, Klaus Fehrle
      • Re: Software Optimization Guide for AMD Family 10h Processors, Anton Ertl
      • Re: Software Optimization Guide for AMD Family 10h Processors, Nick Maclaren
      • Re: Software Optimization Guide for AMD Family 10h Processors, Niels Jørgen Kruse
      • Re: Software Optimization Guide for AMD Family 10h Processors, Bernd Paysan
      • Re: Software Optimization Guide for AMD Family 10h Processors, Klaus Fehrle
      • Re: Software Optimization Guide for AMD Family 10h Processors, Eric Smith
      • Re: Software Optimization Guide for AMD Family 10h Processors, Bernd Paysan
      • Re: Software Optimization Guide for AMD Family 10h Processors, Eric Smith
      • Re: Software Optimization Guide for AMD Family 10h Processors, Bernd Paysan
      • Re: Software Optimization Guide for AMD Family 10h Processors, Eric Smith
      • Re: Software Optimization Guide for AMD Family 10h Processors, Klaus Fehrle
      • Re: Software Optimization Guide for AMD Family 10h Processors, Niels Jørgen Kruse
      • Re: Software Optimization Guide for AMD Family 10h Processors, Klaus Fehrle
      • Re: Software Optimization Guide for AMD Family 10h Processors, Nick Maclaren
      • Re: Software Optimization Guide for AMD Family 10h Processors, Klaus Fehrle
      • Re: Software Optimization Guide for AMD Family 10h Processors, Nick Maclaren
      • Re: Software Optimization Guide for AMD Family 10h Processors, Klaus Fehrle
      • Re: Software Optimization Guide for AMD Family 10h Processors, Nick Maclaren
      • Re: Software Optimization Guide for AMD Family 10h Processors, Klaus Fehrle
      • Re: Software Optimization Guide for AMD Family 10h Processors, Nick Maclaren
      • Re: Software Optimization Guide for AMD Family 10h Processors, Nick Maclaren
      • Re: Software Optimization Guide for AMD Family 10h Processors, Nick Maclaren
      • Re: Software Optimization Guide for AMD Family 10h Processors, Nick Maclaren
      • Re: Software Optimization Guide for AMD Family 10h Processors, Nick Maclaren
      • Re: Software Optimization Guide for AMD Family 10h Processors, Klaus Fehrle
      • Re: Software Optimization Guide for AMD Family 10h Processors, Nick Maclaren
      • Re: Software Optimization Guide for AMD Family 10h Processors, Klaus Fehrle
      • Re: Software Optimization Guide for AMD Family 10h Processors, Eric Smith
• The Hafnium Hoax!, Quadibloc
  • Re: The Hafnium Hoax!, Nick Maclaren
  • Re: The Hafnium Hoax!, Del Cecchi
    • Re: The Hafnium Hoax!, Quadibloc
      • Re: The Hafnium Hoax!, Del Cecchi
      • Re: The Hafnium Hoax!, Quadibloc
      • Re: The Hafnium Hoax!, insert name
      • Re: The Hafnium Hoax!, Del Cecchi
      • Re: The Hafnium Hoax!, Nick Maclaren
      • Re: The Hafnium Hoax!, Quadibloc
      • Re: The Hafnium Hoax!, Nick Maclaren
      • Re: The Hafnium Hoax!, Quadibloc
• where does one discuss publish/subscribe?, Andrew Marlow
  • Re: where does one discuss publish/subscribe?, Zbigniew Jerzak
    • Re: where does one discuss publish/subscribe?, Andrew Marlow
  • Re: where does one discuss publish/subscribe?, Edward Feustel
• Re: Books on BIOS development, Mike Gonta
  • Re: Books on BIOS development, dave
  • Re: Books on BIOS development, Mike Gonta
• Re: Advantages of Parallel Hz, Eliot Miranda
  • Re: Advantages of Parallel Hz, Eugene Miya
    • Re: Advantages of Parallel Hz, Terje Mathisen
      • Re: Advantages of Parallel Hz, Eugene Miya
  • <Possible follow-ups>
  • Re: Advantages of Parallel Hz, Bob Myers
  • Re: Advantages of Parallel Hz, Guy Macon
    • Re: Advantages of Parallel Hz, Nick Maclaren
    • Re: Advantages of Parallel Hz, Radium
  • Re: Advantages of Parallel Hz, John Fields
  • Re: Advantages of Parallel Hz, kenney
  • Re: Advantages of Parallel Hz, The little lost angel
  • Re: Advantages of Parallel Hz, Spoon
  • Re: Advantages of Parallel Hz, kenney
• Re: How to design an abitration cicuit related to interrupt controller, Sean
  • Re: How to design an abitration cicuit related to interrupt controller, Sean
    • Re: How to design an abitration cicuit related to interrupt controller, Quang Anh
  • <Possible follow-ups>
  • Re: How to design an abitration cicuit related to interrupt controller, Quang Anh
  • Re: How to design an abitration cicuit related to interrupt controller, Quang Anh

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newsgroups.derkeiler.com  > Archive  > Comp  > comp.arch  > 2007-05