Re: More Cache to the Chip

On 29 Jun 2006 13:05:28 -0700, "JJ" <johnjakson@xxxxxxxxx> wrote, in
part:

I'd recomend the VLSI Memory Chip Design book by Itoh if your'e
interested, mostly about DRAM. It would help you formulate memory ideas
better.

I was looking around in the local University library for books about
memory.

In my patent searches, though, I think I have now found out why my
"invention" has not been invented by anyone else before... because it is
useless. That's because DRAM cells *do* badly require column amplifiers,
and can't do without them.

This doesn't mean that the principle I've come up is *totally* hopeless.
If a *larger cell size* is used, like 1024 bits of DRAM in each cell,
then putting amplifiers in every cell won't eat up *too* much of the
chip area. Suddenly, though, the bandwidth between memory and cache has
gone down... or, maybe not, if you transfer a whole row at a time. (For
a whole memory, instead of a memory cell, I *did* see a patent for
_that_.) If you can put, say, two megabits on a chip, then it should be
possible to create a one-megabit memory with from 32 K to 128 K of cache
of this type that can transfer 32 Kbits to cache in a single DRAM cycle.
That's still nothing to sneeze at.

John Savard
http://www.quadibloc.com/index.html
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