Re: Disadvantages and advantages of condition code register and general-purpose register



Perhaps a more important question is, could this be done without any
ISA modifications, but with changes to the microarchitecture instead?

Re: Dead registers

It's easy to encode that a register is dead with no change to the ISA:

add r3 <- r3, r2

The old value of r3 is obviously no longer available. You can't get
away from marking values as dead in a 2-address ISA, which is one
of the nice things about the x86 ISA. (The more I look at x86, the
more I think there is a decent ISA lurking in that mess.)

One advantage to knowing that a register is dead is that you can
figure out if it had just one reader. Notice also that most of the
energy cost of an instruction is in distributing the results and
scheduling... ALUs cost almost nothing. So, identifying chains of
instructions which pass values from one to the next with no result
broadcast is valuable, since you can, at minimum, save power by not
broadcasting tag or data. Going further, you can have execution
hardware which consumes a string of instructions and generates and
broadcasts a single result, and does not even have the hardware to
distribute the intermediate results.

But going further may be pointless. Just knowing that you don't have
to broadcast tag+data saves most of the power.

Re: Condition codes

The trouble with condition codes is that they are an extra data input
to your instruction, and so the scheduler must take them into account.

Also, a branch to PC+offset (that's the common kind) which is
dependent on a condition code is a waste of issue bandwidth. When the
thing issues, it just checks that the condition code matches the
speculated value. A more power efficient microarchitecture has the
branch condition code check bundled with the instruction that does the
compare and generates the condition code, so you issue one operation
instead of two.

You can save more power if you avoid having to build this bundle from
discrete instructions, but then you need branch instructions with a
target, and two source registers, plus a rich explanation of how you
want to compare the two datums. That's a big instruction, so now you
need variable sized instructions or some other way to get extra bits
in the branch.

Re: Using general registers instead of condition codes

From the point of view of data going into an instruction, they are
just two different name spaces, which clutters up the rename hardware
a little bit.

.



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