Re: Designing my own architecture to be simulated in software - need help with the ISA
- From: maater@xxxxxxxxx
- Date: 28 Jul 2005 12:18:31 -0700
altanorhon@xxxxxxxxx wrote:
> Hi. I'm a 17 year old student, I'm about go to university in September.
> After the first year, I'll be going into Computer Science or Electronic
> and Computer Engineering depending on the preferences I develop in the
> first year.
>
I am a graduate student studying comp arch.I have built a few computers
in C, behavioral HDL, and gate-level HDL. I will be happy to guide you
if you naad any help.
> I thought it'd be an interesting idea to pick up some books on digital
> design and try to simulate my own architecture in the Python
> programming language, without relying on the features of the language
> at all. Essentially, I want the code to be transparent for real-world
> application so I defined the most basic construct as a NAND gate and
> started building on top of that.
>
Impressive.
> Right now I have constructs for a signed adder/subtractor, an
> encoder/decoder, and registers made from D-flops. I've gotten to the
> point where I need to define clear goals for the project so I can just
> focus on the invidual parts of the implementation.
>
As someone already pointed out, building a machine from NAND gates is
hard. but Since you have the constructs already, might as well use
them. generally a top-down approch is better because it lets you
appreciate a lot of high level stuff. doing gate level to begin with
also adds an extra layer of debugging which can make life miserable. I
recomend that you do not design any further blocks. Just use the
language for now and later you can replace the language constructs with
your own blocks. This way you will not make any blocks that will not be
used.
> Word length is 32-bit, and the ALU and registers and memory conform to
> the standard. Since I want to encode each instruction in only one word,
> memory address range is limited to 16 bits. I figure 256KB should be
> enough for anyone.
>
Fixed length Uniform decode is the way to go for a machine of this
size. I am not sure if I clearly understand this. How do you plan to
encode memory. You do not need to constraint your memory just for this
reason though. There are much better ways of doing it. Let me know if
you want me to elaborate this further.
> I/O is memory mapped, so I don't need special instructions for those. I
> do plan to have graphical output, a 320x240 display with 1-bit color.
> This will consume 960 bytes of address space, just to give an example.
> I have plenty of room for expansion, and maybe I could even add a
> "paper tape" device as permanent storage.
>
Your call.
> I'm reserving the HO byte of the word for the instruction type, so I
> can theoretically have 256 different instructions though I plan to have
> much less. The register operands are half-bytes in length, so I can
> have a total of 16 registers in the core. The remaining 2 bytes allows
> me to address the memory in operations that require it.
>
like I said, not every instruction is a memory instruction so I would
not reserve bits in the iWord for memory. There are better ways to do
this.
> I'm very much a beginner, and the reason I undertook this project was
> to learn as I go along. I don't have any practical experience with
> assembly language, but I understand how it works and I have examined
> the instructions for my iBook's PowerPC processor and the MIPS R3000
> instruction set.
>
Indeed, you have done a wonderful job.
> Unfortunately, experience is something that would be very helpful when
> defining an instruction set. I need to know what I need to implement at
> the hardware level, and what things I could piece together and simulate
> in the assembler.
>
As I said, just bug me whenever you want. This project interests me. so
never hesitate. I know that I will probably learn from this project too
so it will be for my benefit.
> I'm pretty sure I can allocate 8 of the registers for general purposes,
> and I'm allocating the other 8 for special purposes just in case. One
> of them will contain the current instruction, one will contain the next
> instruction, and one I can use as a pointer for returning from a
> branched instruction.
>
Dont do that. I dont think you should have special purpose registers
ISA visible. The programmer should not have write priveleges to those
register through add/sub like instructions. They should only be
written/read by special instructions like branch, jump, return etc.
This is just my personal opinion.
> Here's my instruction set so far. I would really appreciate some tips
> as to what I could add or remove.
>
> nop - no operation
>
yup.
> add - store the sum of two registers in a register
> sub - store the difference of two registers in a register
>
as someone pointed out, carry/overflow flags can be useful.
> not - store not (contents of register X) in a register
> and - store rX & rY in a register
> or - store rX | rY in a register
> xor - store rX ^ rY in a register
> lsh - store rX << rY in a reg
> rsh - store rX >> rY in a reg
>
> jmp - jump to instruction at memory address mX
> jeq - jump if rX == rY
> jne - jump if not equal
> jlt - jump if less than
> jle - jump if less than or equal
>
this reminds me that you have not talked about condition code registers
and status registers at all. how are you planing to do that?
> bun - set Branch Return register to instruction below current, set Next
> Instruction to mem address mX
> beq - branch if equal
> bne - branch if not equal
> blt - branch if less than
> ble - branch if less than or equal
>
>
> Those of you with more experience in assembler, does this look like an
> adequate instruction set for the hardware if I combine it with some
> macros in the assembler? Any other tips?
It is a good one. in fact you simplify a bit. you need a return
instructions. I think you should get rid of bun, and have a pair of
instruction called CALL/RETURN . The call can just be unconditional.
Good luck ,
.
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