Re: DCM Jitter


"Peter Alfke" <alfke@xxxxxxxxxxxxx> wrote in message
news:0cb28ad3-c345-41dd-ac70-ee9ad001938e@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx

I suggest you use the highest possible frequency for your pulse-width
modulator clock. That gives you best resolution (granularity) and
avoids the jitter issue you are (rightfully) concerned about.

Hi, Peter. The PWM is a continuous analogue output, generated by an
AD9901-style phase detector inside the FPGA. There is no granularity.


.

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