Re: Xilinx XAPP052 LFSR and its understanding

Weng Tianxiang <wtxwtx@xxxxxxxxx> wrote:

The reason I want to exclude the dead-lock situation is that in my
project, I use the random number generator to generate random number
to detect design errors. If there is an error, my design will detect
it. But if all numbers generated are the same from some point, there
is no error generated and my testing is just waiting time, giving a
false correct indicator.

But many zeros in seed may guarantee that the situation of all '1'
will never happen.

Any zeros in the seed will guarantee that it never happens.

The only way to get to the all ones state is to start there.
(Well, there is also cosmic rays going through and changing
the bits, but if that happens you have other problems, too.)

That does assume a properly designed LFSR. If you randomly
choose taps it is likely that you get one with short cycles.

-- glen

.

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