Re: New person to CPLD programming



Glen Herrmannsfeldt wrote:
doug wrote:
(snip)

That depends. I still like schematics as it is far easier
to see the flow. Components under the main schematic are
in VHDL when it is a better choice. If there is a lot of
connectivity, schematics are far easier to understand.
Chasing things around in a text editor is always a real
pain. I am visually oriented and I like to follow the
flow. However, things heavily logic oriented are
sometimes easier for me to put in VHDL. Big multiplexers
are another. In the end, the code is about half and half.


I think my choice would be to write in verilog, and then use
a verilog to schematic conversion program. They aren't
perfect, but maybe good enough.

Do you have any good examples. The ISE translations are mostly
useless.

If the verilog is appropriately
modular, then the schematic for each module isn't too complicated.

It is probably easier to have the program make verilog
from schematics and then we know the schematics are readable.

One argument is that HDLs are more portable and that is
true but it is of more importance to people who move
between chips more often. I have been using Xilinx chips
since 1991 so I am pretty old and slow to change my ways.


Yes, but Xilinx changes the families often enough that it
might just as well be different.

They also have changed the software a lot. The older software
used to require a reboot after a PAR run. If you did not
do it yourself, it would blow up for you. The one thing that
seems to have gotten worse over the years is the guided routing.
In the early 90's, it worked well. The other part that has
gotten much worse is the synthesis. They also hired a bunch
of programmers who had never used fpgas to develop ISE starting
with version 7 and the interface has gotten worse with each
version. Well, I do not know about version 8 since there
was such a memory leak in the schematic conversion (meaning
that their "testing" procedure was the same as Microsoft,
meaning that if it compiles it must be correct) that it
never would process my schematics. Version 9 would not
either since they changed some of the reserved words and
gave no way to find that out.


-- glen

.

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