Re: PCI newbie problems



Are you referring to the "LogiCore Endpoint for PCIexpress"? If so,
there is a manual on the Xilinx web site that I would look at first.
Essentially there are two 'packet ports' one for incoming packets and
one for outgoing (response) packets. Here you will have to attach some
form of state machine to generate/handle your data. I am sure there are
some examples available from Xilinx. PCIexpress is a packet-based protocol.

To be honest, I think you will find it extremely hard work if you don't
familiarise yourself with PCIexpress first. A good starting point is
the Mindshare book by Anderson/Budruk/Shanley. I think there is also an
electronic version available. It's a big book but the first few chapters
are enough to get you started. For your test case, an understanding of
the following points is most important.
1) How to decode a PCIexpress packet. (Essentially a sequence of 32-bit
words)
2) When and how to generate a response packet (i.e. for all accesses
except Memory-Write/Message packets).

As regards writing to memory using PCItree. I am not so sure whether
that will work at all. If I remember correctly, PCItree really aims at
accessing configuration space. You will probably not be able to access
device memory space, either memory or I/O (to be more accurate, you
shouldn't be able to) if your device hasn't been enabled by the
operating system (Bit 0 in Command register in configuration space set
to '1'). For this you will need a device driver, since an OS typically
does not enable a PCI device for which it cannot find a driver. If you
are using Windows I'd recommend the KMDF framework (available from the
MS website). If you are working under Linux, take a good look at the
kernel sources and also Rubini's book which is available at O Reilly or
a number of online sources. In your case for just writing to a seven
segment display, under Linux you might get away without a driver since
many parts of the PCI API can be accessed from user mode.
If you do this with memory writes you don't even have to worry about
generating response packets in you hardware. But I expect you still have
to somehow set Bit 0 in Configuration-space.Command-reg first.


Massi schrieb:
Hi everyone,

I'm trying to set up a toy design on a Xilinx Virtex 5 (Avnet PCI
Express Development Kit board) and I'm having big problems to
understand how PCI works. I downloaded the PCI endpoint core bitstream
for the Programmed IO on the board and plugged it into a pc,
everything seems to work fine as a matter of fact PCI tree succeeds in
recognizing the board. My aim now is really simple, I would like to
write a byte on the memory space of the board (with PCI tree) and to
display the byte value on a seven-segment display. What I can't
understand is "where and how" I have to take the byte (from the FPGA
side), that is which signals of the PIO design I have to handle in my
module.
I apologize if my question is not very clear, but I'm a total newbie
in PCI, any hint or advice to understand it better would be really
appreciated.

Thanks in advance.
.



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