Re: Xilinx FPGA editor tips?

Michael Brown wrote:
I've got a skew-sensitive part of my design that I need to place and route
by hand - no matter how much I try and help it ISE just doesn't seem capable
of getting the skew below about 1.5 ns, whereas hand routing (using a
symmetrical pattern) can get it down to zero according to the editor, which
I assume means it's probably about as good as it's going to get :)

Anyhow, using the FPGA editor is, I find, simply painful. Sometimes it comes
back and says "Nothing found to route", other times "Cannot manually route",
and simply repeating the exact series of clicks will then route happily.
Other times it doesn't route what I have selected - despite having a (as far
as I can tell) correct route, it'll go and send the net half way across the
FPGA and back again. While this is somewhat annoying, there's two things
that make it much worse - apparently there's no "undo" feature, and even
worse there's no way to partially unroute a net. So typically what happens
is I nearly complete the net, it throws a route half way across the FPGA,
and I have to start the net all over again from scratch. As a result, all
this has turned what should have been a 1 hour job into something that took
close to two evenings.

So, apart from the somewhat useful supplied documentation, does anyone have
any good links for taming the FPGA editor?


Oh, and also the autoroute feature seems to really hate my design. Select
any two pins (or a net), click autoroute, and then it crashes . No error
message, it just disappears. This happens in 9.1i SP3 and 10.1 SP1 (though I
haven't really played around too much with 10.1 because it's so much
slower - I didn't know it was even possible for an application to take 3
seconds to close a "find" dialog box!)

--
Michael Brown
Add michael@ to emboss.co.nz ---+--- My inbox is always open

No links but a couple quick pointers:
When a bad route occurs, it's usually associated with one
destination pin. If it isn't yet due to partial routing, finish the
connection of that route to one valid destination pin. Then select
*only* that destination pin (no net) and hit the "unroute" button.
The entire net is not unrouted, just what's associated with that
connection.
To try to autoroute one portion at a time, click only the single
destination pin and hit autoroute to see if the route for that portion
of the net takes an acceptable turn. If not, unroute the one pin and
start back to manual routing.

Be sure you have your autorouter set up before you try autorouting,
whether individual pins or full nets. The defaults tend to be the
"totally lackluster results" settings rather than timing and/or
resource friendly settings.

Knowing the aoutoroute and unroute can be per-pin can sincerely help
in getting things done.

You may have discovered that manually routing segments sometimes
requires you turn off the routes so you can select a segment rather
than the partial net that's occupying that segement. You can click
the route display back on before or after performing the partial
route.

My recollection on this point is less clear: if you select the driver
and one destination, the "route" button may try to add that one
connection pair to any existing partial net similar to the autoroute
with only the destination selected. For manual routing I often have a
common segment selected, select one distination pin, route, deselect
the destination pin, then select a different destination pin which
keeps the common segment selected (since it's hard to select thanks to
the display of the routed nets).

Isn't FPGA Editor fun?!

- John_H
.