Re: async clk input, clock glitches
- From: Antti <Antti.Lukats@xxxxxxxxxxxxxx>
- Date: Sun, 30 Mar 2008 15:02:29 -0700 (PDT)
On 30 Mrz., 23:34, "KJ" <kkjenni...@xxxxxxxxxxxxx> wrote:
"Antti" <Antti.Luk...@xxxxxxxxxxxxxx> wrote in message
news:ff1c62b5-f856-4740-9c12-5e303525500b@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
On 30 Mrz., 22:42, j...@xxxxxxxxxxx wrote:
On Mar 29, 9:59 pm, Antti <Antti.Luk...@xxxxxxxxxxxxxx> wrote:that can only happen if the pulse was not latched proper level for
many clocks of 50mhz, something i can really not understand.
well all those errors have disappeared happily, without schmit trigger
or any other magic
Just what was the change anyway? Getting rid of using the strobe to clock
things or something else?
KJ
well as soon as the strobe is passing one FF clocked at 50mhz
there was measurable error rate for both extra and missing strobes.
thats basically it. I had some of the design tested on Xilinx and bad-
proto
where I had to filter the signals, so at design change i removed some
filters
and in the strobe left 1 FF what looked like good solution until i did
start
to measure the actual error rate..
Antti
.
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