Re: Which FPGA and memory to use? The eternal X vs. A question.
- From: Subroto Datta <sdatta@xxxxxxxxxx>
- Date: Sat, 8 Dec 2007 09:13:57 -0800 (PST)
On Dec 8, 8:55 am, n...@xxxxxxxxxxx (Nico Coesel) wrote:
Alex Freed <al...@xxxxxxxxxx> wrote:
I need to build a sort of a simple video processor to drive a TFT LCD
screen in an embedded system. The plan is to use a small and cheap FPGA
with some memory. Low cost is very important, so fast SRAM is not an
option.
I want to test the concept on an off-the-shelf board before making my
own, so I got the Spartan 3E "starter kit" that comes with DDR SDRAM.
Unfortunately I can't make the memory work using the core generator.
Most likely I'm not doing something right, but maybe there is some
problem with the hardware.
While searching for info on SDRAM interfacing I got an impression that
the DDR SDRAM is very difficult to use and the board layout is very
critical. For my application 133 MHZ DDR is a heck of an overkill as I
only need to read 16 bits of consecutive data at 50 MHz (burst) max.
Most DDR wil operate down to 81 MHz. At 81MHz it is not so difficult
to get DDR working. Just stay away from the MIG tools for simple down
to earth solutions.
So regular SDRAM is probably a better choice. I'm also using Micron
SDRAM elsewhere on my device (with the PXA255 CPU).
You can probably design a controller which does both SDRAM and DDR.
The control signals are very similar. The only difference is that DDR
outputs data on both edges.
Looking for a board with built in SDRAM I came across the $150 Altera
DE1. Traditionally I used X more than A, but those were CPLDs rather
than FPGAs. The data *** looks promising. Only 2 power voltages. Same
cost (Cyclone 2 vs. Spartan 3e).
There is also PSRAM as an option and a Digilent board with S3e and
PSRAM, but it is more expensive than plain SDRAM by far.
My volume is about 10,000 a year. I figure about $5 for FPGA and $1.5
for SDRAM (8 MB). PSRAM is more like $5.
Am I missing something? I'd like to hear opinions before making the next
move.
One thing to watch out for is that (AFAIK) Altera has no memory in
their slices. In Xilinx FPGAs it is possible to use the lookup table
as a 1x16 bit memory. This can prove very usefull for creating small
memories (like dual buffers, fifos, etc). In Altera devices you'll
need to use flipflops. A 32x16 memory uses 16 slices in a Xilinx
device and probably at least 256 or 512 slices (some extra slices are
needed for the memory decoder and data muxes) in an Altera device.
--
Reply to nico@nctdevpuntnl (punt=.)
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Hi Alex and Nico,
The Stratix III devces allow individual LABS to be configured as
small grain distributed memory. More details can be found at:
http://www.altera.com/products/devices/stratix3/overview/architecture/st3-trimatrix.html
The Stratix III devices have the additional advantage of being the
most power efficient devices in their class today.
Hope this helps,
Subroto Datta
Altera Corp.
.
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