Re: Drawing timing-diagrams for documentation

From: Chris Maryan <kmaryan@xxxxxxxxx>
Date: Fri, 30 Nov 2007 07:11:01 -0800 (PST)

I thought this was rather cool, a timing diagram font:
http://www.pcserviceselectronics.co.uk/fonts/
I've played around with it and it seems pretty good for most needs.

Chris
.

References:
- Drawing timing-diagrams for documentation
  - From: Sean Durkin

Prev by Date: Re: Asynchronous FIFO and almost empty - bug?
Next by Date: Re: What's the difference for VHDL code between simulation and synthesis?
Previous by thread: Drawing timing-diagrams for documentation
Next by thread: Hand solder that FPGA on your prototype
Index(es):
- Date
- Thread