Re: Power supply filter capacitors

Do yourself a favor and at least design in the capability of populating a
snubber. I would also add a hi-feq filter cap at the gate of the TRIAC.
Doing these two things will give you recorse to deal with noise at the gate
and any transient dv/dt acorss the TRIAC, both which could inadvertantly
turn the TRIAC on. And when you're picking components remember that you're
dealing with 120V AC.

I don't think you mentioned anything about how much load the TRIAC's will be
switching. Make sure that you heat sink the TRIAC's, if need be.



"Nevo" <nevo_n@xxxxxxxxxxx> wrote in message
news:Z8cUi.8183$0l4.6389@xxxxxxxxxxx
I'm woefully undereducated to be doing this, but I figure the best way to
learn is by doing, so I need a little help with my current project.

I'm designing a lighting dimmer around the Altera Cyclone EP1C6 in the 240
pin package. I will be using the chip to turn on and off up to 128
optoisolators at a frequency of 120Hz. (The optos will feed the gate pins
of TRIACs which will turn Christmas lights on and off. By turning the
optos on in the middle of an AC half-cycle I plan on getting dimming in
addition to on/off.)

Each opto will draw a maximum of 7mA. The FPGA will be sinking the
current from the opto, not sourcing current.

Absolute worst case would be all 128 channels switching simultaneously,
although I doubt that would happen very frequently. (For one, I don't
have enough circuits to drive 128 strings of Christmas lights without
tripping a breaker at the house.)

I have no clue how to determine what size capacitors to put between the
VCCIO pins and GND. If anyone could give some guidance, I'd appreciate it.
(If you happened to use my particular implementation as an example, I'd
appreciate it that much more!)

Thanks, all!

-Matt



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