Re: FPGA NTSC signal with 2 resistors and PWM



On Sep 29, 5:31 am, Antti wrote:
hm, i browsed your website and found interesting things :)
and hints for more interesting thing without download links :(

I have some random stuff at http://www.merlintec.com/download/ but
unfortunately that doesn't include any HDL code yet. I will try to
find the NTSC test next week (in VHDL) and make it available.

hm by 4 resistor you mean 4 bit 2N DA stage or something else

I considered the output to be a 75 ohm resistor to ground, so just had
4 resistors (N, 2*N, 4*N and 8*N) between the FPGA pins and the RCA
connector. Video quality was not a requirement for this project (the
video output was only used by me during development and not by the end
customers) so I didn't bother adding capacitors to filter things a
bit. The DA was calculated to go from 0 to 1.5V in 0.1V steps with the
FPGA i/o programmed for 3.3V TTL levels. For black and white going to
1V would be enough, but for color you have to add a sine and need to
go higher.

on the test PCB I included 5 bit R-2R network, that could be little
better then 4 resistors,

You would get twice the brightness levels and twice the sine
amplitudes (saturations) for a total of four times as many colors. You
would also reduce the noise level, which would improve the image
considerably.

but if delta sigma with high clock gives nice results I would go with
it, or then 4 R version ;)

It is interesting to see what the delta sigma DAC can do, but it might
introduce too much jitter for the color circuits to work properly. On
the other hand, real TV circuits have limited bandwidth and might just
ignore all the extra noise.

ah, the results of the 2 resistor PWM greyscale also look better on TV
set then on usb capture device.
the 16 grey bars are all visible nicely.

That is what normally happens. A digital video capture circuit is
probably more picky about the signals it accepts.

One cute trick I came up with (but did not implement in the test
circuit I mentioned) was using Xilinx 16 bit shift register slices to
generate phase modulated sines for the chroma circuit. For each bit
you cascade two of them, where the first is always 16 bits long and
feeds back to itself (at reset it gets the correct pattern to repeat)
and the second one varies from 1 to 16 bits of delay. You can do a
four bit generator with only 8 slices.

-- Jecel

.



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