Re: 2 leg crystal on FPGA: Lattice vs Xilinx

vasile wrote:

On Sep 28, 11:30 am, Antti <Antti.Luk...@xxxxxxxxxxxxxx> wrote:
Hi

I know many wise men has said NO NO, but

1)http://www.latticesemi.com/forums/forum/messageview.cfm?catid=42&thre...

Lattice engineer suggest that it works (assumable reliable) on machXO

the IO technology between machXO and Xilinx FPGAs isnt so big so I
wonder why cant it be done with Xilinx ?

for what I see is following

25MHz crystal
27p caps
560 series
1M parallel

when using LVCMOS33 SLEW=FAST

This structure works with *any* kind of logic if you understand it has a
pure analogic behaviour and you treat it as a sensitive analogic stuff
(and not a digital one like most software guys do).

Well, no. Back when I was quite a bit younger, I tried to build a stable
oscillator with a unused gate on a TTL 7414, with is an inverter with
hysteresis. Tried all sorts of values of capacitors and resisters, and the
best I was able to do was to usually generate the third harmonic.
Sometimes the fifth, sometimes some other multiple of the crystal
frequency, sometimes not a stable frequency, and sometimes even the
frequency of the crystal. Switched to using a 7404, a plain inverter, and
then making a stable oscillator was easy.


--
Phil Hays

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