Re: Basic questions about the Nios II.




Ok, again that clears much up. But programming my algorithms in VHDL
then placing them on an FGPA would result in far superior than using
the Nios II core? It is probably a 'how long is a piece of string'
type of question, but what performance penalties are there in using
the Nios II core in comparison to direct VHDL programming?

If a state machine gets really complicated, it's often
easier/simpler to turn it into a software problem. Usually,
"complicated" means lots of states. Sometimes it can be
lots of things to do each cycle. In that case, think of
a wide instruction rather than a typical RISC instruction.
That sort of software is often called microcode.

I haven't worked with Nios. I assume it's a reasonably typical
software environment. Software is often easier to change/fix/manage
and it's often easier to hire software people than hardware people.
(Though a web designer type software person isn't likely to be
useful on this sort of software.)

--
These are my opinions, not necessarily my employer's. I hate spam.

.



Relevant Pages

  • Re: Basic questions about the Nios II.
    ... then placing them on an FGPA would result in far superior than using ... the Nios II core in comparison to direct VHDL programming? ...
    (comp.arch.fpga)
  • Re: DMA and PCI in SoPC Builder
    ... Your options are to instantiate a small Nios II ... design your own IRQ management master.....or wait for the next ... release of the PCI Compiler core, ...
    (comp.arch.fpga)