Spartan3E and DDR termination

From: Guru <ales.gorkic@xxxxxxxx>
Date: Thu, 30 Aug 2007 01:59:33 -0700

Hi all,

We are building a board with Spartan3E (XC3S1200E FG320) and a 64MB
x16 DDR (HYB25DC512160CF-6). Trying to make the board as tiny as
possible the DDR termination presents a problem. Since the Spartan3E
does not have DCI, termination on chip is not possible. This means
that 44 termination resistors should be added and maybe a VTT power
source. The other problem is that according to MIG we should connect
DDR to two banks.

Any good suggestions?
Is it possible to eliminate termination resistors?

Cheers,

Guru

.

Follow-Ups:
- Re: Spartan3E and DDR termination
  - From: Brian Drummond
- Re: Spartan3E and DDR termination
  - From: Bob
- Re: Spartan3E and DDR termination
  - From: Gabor

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Relevant Pages

Re: Spartan3E and DDR termination
... possible the DDR termination presents a problem. ... termination on chip is not possible. ... and an SO-DIMM without DCI on the data lines and SSTL2_I drive. ... requirements for VREF and DQS pins on the FPGA and no ...
(comp.arch.fpga)
Re: Spartan3E and DDR termination
... possible the DDR termination presents a problem. ... termination on chip is not possible. ... requirements for VREF and DQS pins on the FPGA and no ... I have asked how looks the Vref internal circuitry of a DDRAM II. ...
(comp.arch.fpga)
Re: Spartan3E and DDR termination
... possible the DDR termination presents a problem. ... termination on chip is not possible. ... Is it possible to eliminate termination resistors? ... and an SO-DIMM without DCI on the data lines and SSTL2_I drive. ...
(comp.arch.fpga)
Re: DDR Termination
... I am creating a design using a Xilinx Virtex II Pro and some DDR memory. ... resistors on the appropriate tracks to VTT at both the DDR and FPGA. ... you may be able to simplify the termination scheme. ...
(comp.arch.fpga)
Re: Spartan3E and DDR termination
... possible the DDR termination presents a problem. ... termination on chip is not possible. ... Is it possible to eliminate termination resistors? ... and an SO-DIMM without DCI on the data lines and SSTL2_I drive. ...
(comp.arch.fpga)