Re: Best CPU platform(s) for FPGA synthesis



PFC wrote:

3 GB is a practical limit because the PCI bus and other memory-mapped
devices typically occupy some hundred megabytes of address space. So you
can't use this memory space to access RAM.

These are usually not mapped into the address space of a user process.

Nope, but the (32-bit) kernel needs to see the mmap'ed peripherals + the userspace RAM if implementation of stuff like file reading, etc is to be efficient (without juggling with pages)...

Anandtech ran an article which does quite a good job in explaining the 2 and 3 GB barriers.
http://www.anandtech.com/gadgets/showdoc.aspx?i=3034
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