Re: Best CPU platform(s) for FPGA synthesis
- From: "comp.arch.fpga" <ksulimma@xxxxxxxxxxxxxx>
- Date: Sun, 29 Jul 2007 09:52:40 -0000
On Jul 28, 10:51 pm, Andreas Hofmann <ahn...@xxxxxxx> wrote:
3 GB is a practical limit because the PCI bus and other memory-mappedThese are usually not mapped into the address space of a user process.
devices typically occupy some hundred megabytes of address space. So you
can't use this memory space to access RAM.
Kolja Sulimma
.
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