Re: Newbie's first FPGA board !
- From: PFC <lists@xxxxxxxxxx>
- Date: Sat, 14 Jul 2007 16:25:56 +0200
So, the question is, would experienced people be willing to spend a few
minutes reviewing my schematics to tell me if I have some obvious errors ?
What format should I use ? I use Eagle, so I can give Eagle files or
plain PDF.
If you posted a link to the PDF, people would probably look...
Obviously !
I wanted to ask for the preferred format first, though.
I have used FPGAs but this is the first time I design a FPGA board, so it would really be cool to have some "divine intervention" from the experts here to zap my bugs before they are comitted into copper.
So, here is a PDF of the schematics :
http://home.peufeu.com/nik/fpga/board_v01/schema.pdf
Since the free version of Eagle supports only one schematic ***, this isn't very printable (since everything is on one page !)... also, it somehow converted the text to vector. Duh.
Anyway, this is a simple FPGA board with a Spartan 3E-500, 32 bit SDRAM, and a SMSC LAN9117 as network MAC+PHY.
I went for simplicity so it has linear regulators ; and I didn't try to use the OpenCores MAC.
This MAC chip has a nice interface and is supposed to be easy to program. Also drivers are available for happy hacking.
I won't be using any OS since application is Ethernet streaming up to 100 Mbps and the Linux TCP/IP overhead is way too large for poor Microblaze.
SDRAM and MAC do NOT share a multiplexed bus since I want to be able to extract some good network performance from this design.
Board layout needs to be done. This depends on the actual parts matching the Eagle libraries. Since I drew most of the large parts footprints from the datasheets, this means this will have to wait until I actually order and receive the parts from DigiKey, and put them into a laser printed paper version of the PCB to check alignment of the pins with the pads and holes. I hate it when the pins don't fit in the holes.
And, the FPGA pin-swapping obviously depends on the routing. Which is waiting for the parts. Chicken and egg !
Hence, in this schematic, all the address and data busses are not connected, and some signals too.
Please do not look at this, since this is the easy part.
Instead, I would really like some advice on the FPGA specific stuff, which is the hard part for me since it's the first time :
- did I route the clocks to the right pins so the DCMs are happy ?
- should the FPGA generate the clock to be sent through the connector or should I send the oscillator's output ?
- is the power supply OK ?
- will it really program itself from the flash as the data*** says ?
- will my JTAG work ?
- is my Ethernet jack schematic and layout OK ?
- will it smoke ?
- will my SPI interface & prog_b jumper be enough to rescue a crapped up flash bitstream ?
- does it suck ?
- do I need to add resistors to the data lines ?
Well I guess you get the idea ;) I will build a shrine to a guy nice enough to save me a PCB iteration !!!
Thanks a lot,
Pierre
.
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