Re: adaptive filter FPGA

On Jun 10, 2:38 pm, "cutemonster" <ckh...@xxxxxxxxxxx> wrote:
So you want to display a stroke signal on monitor?
Why you need to sample the X? Is it time dimension? Is it a constant
ramping, or ramping with retrace, or random?

I have to sample x and y because it doesn't work like raster signal.
It's
voltage varies in time. There is another signal input called
Unblank(TTL).
It turn on and off of XY signal.

Have you tried to lock the sampling clocks to the unblank?



No, I don't understand how to lock it with sampling clock. Can you please
explain?

thanks
.

Relevant Pages

  • Re: adaptive filter FPGA
    ... Is it time dimension? ... ramping, or ramping with retrace, or random? ... Have you tried to lock the sampling clocks to the unblank? ...
    (comp.arch.fpga)
  • Re: adaptive filter FPGA
    ... Is it time dimension? ... ramping, or ramping with retrace, or random? ... There is another signal input called Unblank. ...
    (comp.arch.fpga)