Re: DDR2 with Spartan-3A anybody having success??

there is one example in sdram directory of s3ask_test design (follow
3A reference design in xilinx web site), but this is only an
implementation of the DDR2 testbench ; the one that is generated with
mig 1.7. (a led blink if memory fails)


In mig user guide ug086, there is a brief explanation of the design ;
and I am too new to design to use it without tb (i.e. read / write
example from fpga with picoblaze would be a must...) ; if you can
help, I will apperciate.

I got 3 starter kit 3A from avnet in less than 1,5 week



On Apr 30, 2:43 pm, Antti <Antti.Luk...@xxxxxxxxxx> wrote:
an unhappy owner of the fresh new Spartan-3A development kit from
Xilinx:

reason for unhappiness:

1) NO examples how to use DDR2 IP core with Spartan3A
2) NO EDK reference design for this board at all
3) NO EDK Board support package available

Spartan 3A is only supported by EDK 9.1, but EDK 9.1 seems have bugs
that force the need to run synthesis manually (automated build doesnt
work)

Should we now really wait EDK 9.1 SP2 ?

My Spartan-3A kit was delayed at post for 30 days, so when i finally
got it I was extremly happy!!!

But it seems it arrived too early as Xilinx has not support for this
board yet? :(

Antti


.

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