Re: Problems with Xilinx Parallel III Cable
- From: Uwe Bonnes <bon@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx>
- Date: Thu, 29 Mar 2007 17:04:44 +0000 (UTC)
Peter Wallace <pcw@xxxxxxxxx> wrote:
....
I have a simple upgrade to the parallel cable III that has Schmitt
triggers on the clock, and a simple shunt regulator with an LED that
limits internal VCC to about 4V, giving TTL compatible LPT interface even
if used with 5V JTAG.
It works reliably with 2.5V to 5V JTAG chips
I have PCBs which I can send for free as long as its in the USA (1"x1"A combination of LVC Single Gate Schmitt Trigger and the LVC1T45 level
card in envelope) Requires SMT assy
translator also works fine
Bye
--
Uwe Bonnes bon@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt
--------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------
.
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