Re: Large power planes vs. power islands vs. slits for decoupling

Symon wrote:

"Jim Granville" <no.spam@xxxxxxxxxxxxxxxxxxxxxx> wrote in message news:45ec68c8@xxxxxxxxxxxxxxx

Of course, the ideal is to have Xilinx put this into the BGA carrier .


Hi Jim,
Right.
I wonder if some of those interposer materials might offer a solution in the future? Some sort of bypass circuit in between the BGA and the PCB somehow?
Dunno, Syms.

Hmm, yes, the largest one is close to die-sized, at ~17x15mm,
(a monster, and also 2.5mm thick), but for that you get wideband low-milliohms impedances, and 300uF/1000uF,
so imagine a couple of BGA layers made of this stuff....
- probably worth more to customers than putting the boot-prom into the package, measured in practical PCB area cost, and EMC/RFI gains....

Interesting this was driven by the games industry, which also gives us the Cell CPU..

In the short term, I think one of these/rail on the opposite side of the PCB, would be a usefull step, that only needs the Chip & FPGA vendors to talk to each other.

Of course, Xilinx's volumes are far less exciting than PS3.

It's a little hard to decode the exact footprint/keepouts of these.

-jg

.

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