Re: What is the running frequency for a typical FPGA application using Virtex 5



Weng Tianxiang wrote:

Hi,
What is the running frequency for a typical FPGA application using
Virtex 5?

A friend of mine told me long ago that we could expect to get 1/10
running frequency of the fastest CPU for a fastest FPGA in market.

Now the fastest CPU runs at 4GHz, can a FPGA application using the
fastest FPGA chip be expected to run at 400MHz, 1/10 of fastest CPU?
Is Virtex 5 the fastest FPGA so far?

For example, DDR2 runs at 333MHz, can a DDR2 application core run
normally at 333MHz without any trouble such that there is no need to
reduce application core running frequency to meet 333MHz challenge? If
so for Virtex 5, it can be claimed that 333MHz is achievable.

1/10 ratio between the fastest CPU and the fastest FPGA chip running
frequencies is a reasonable expectation or not?

Thank you.

Weng


I expect V5 can be run at 400MHz with careful design fairly easily. It is faster than Virtex4, and I have successfully completed non-trivial V4 designs that run at 400 MHz. Issue 3 of the Xilinx DSP magazine, which should be coming out very soon, has an article in it about a 1.2 GSample/sec Floating point FFT design I did in it. The FFT engines in that design are clocked at 400MHz. The device is a Virtex4 SX55 -11.

Clock rate around 1/10 of fastest CPU seems reasonable, but it will generally take an experienced FPGA designer to achieve that.
.



Relevant Pages

  • Re: What is the running frequency for a typical FPGA application using Virtex 5
    ... What is the running frequency for a typical FPGA application using ... fastest FPGA chip be expected to run at 400MHz, 1/10 of fastest CPU? ... Is Virtex 5 the fastest FPGA so far? ...
    (comp.arch.fpga)
  • Re: Resetting FPGA Without watch dog timer
    ... Tying an output of the same FPGA to the PROG line input is not ... This nice design was changed in some of the Virtex and probably also ... Virtex, Virtex-II and Virtex-4 need an external delay. ...
    (comp.arch.fpga)
  • Re: Can a FPGA work like a microprocessor ?
    ... The hard IBM 405 PowerPC in Virtex II Pro, and Virtex 4 is optimized for low power, not for high speed. ... Generally speaking, the FPGA will get hot from doing all of the other things it needs to do, that having a uP on the same die requires that uP to be low power, not super high speed. ... Interfacing to the uP is done with the auxiliary processor unit interface on the Virtex 4 FX parts. ... an automotive electronics supplier decided that providing maintenance for a new uP every year was far more expensive thaqn using an entirely soft uP solution in a Spartan device. ...
    (comp.arch.fpga)
  • NGCBUILD .. MDT error on Virtex 4
    ... bitstream for the Microblaze softcore to be ported on to Virtex 4 FPGA ...
    (comp.arch.fpga)
  • Re: virtex xcv:no way to see TDO moving:
    ... tried to make my pc communicating with various xilinx ic's; ... pin)the fpga is mounted on a scraped board,there is a linear voltage ... anyway during boundary scan check i only see TMS and TDI high and a signal ... Is it Virtex E, XCV200E... ...
    (comp.arch.fpga)