Re: DDR2 at 125MHz or lower with Cyclone2

The DDR2s use Delay Locked Loops to produce strobes and data in specific
timing relative to the system clock. Specifying a lower limit in the DDR2
definition allows the silicon vendors to design a delay line of specific
length to implement the DLL function.

Terminations probably are not required at 125 MHz; you can terminate in and
only in the DDR2 itself by always driving the On Die Termination.


<visualfor@xxxxxxxxx> wrote in message
news:1151528734.566004.218370@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
Hello all,

I am starting a brand new design, memory speed is not important (but
depth is). This is my first time designing with any high speed memory.
I have two questions:

1. Why does Micron data *** say minimum clock is 8ns (125MHz). What
happens when you run DDR2 at lower speed (refresh problems?)
2. My simulation (Hyperlynx) looks OK with no termination. Has any
body tried running DDR2 at 125MHz with no termination whatsoever (only
10 ohm series with DDR2 inputs)



I would really appreciate any response

Thanks,

--
Naveed



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