Re: Xilinx 3s8000?
- From: Thomas Womack <twomack@xxxxxxxxxxxxxxxxxxxxxx>
- Date: 06 May 2006 11:23:22 +0100 (BST)
In article <QJW6g.613$8C.42@xxxxxxxx>, Ron <News5@xxxxxxxxxx> wrote:
Tobias Weingartner wrote:
Is this close to what you're looking at doing?
http://www.hyperelliptic.org/tanja/SHARCS/talks06/bulens.pdf
Thanks for the article Tobias. Parts of it look interesting, but no,
what they are doing bears little resemblance to what I have done. As I
said earlier, my ECM algorithm is coded entirely in Verilog HDL with no
connection to an external PC or anything else (nor any embedded
microprocessor core). Once it's programmed I turn it on (the number to
be factored is hard coded into the FPGA) and wait for it to factor the
requisite composite number and invoke a module I'll have to write myself
because Xilinx only provides VHDL examples of it's interface) that
displays the factor.
I think you are entirely misguided in contemplating using ECM to
factor 'hard' numbers such as the RSA Challenge ones; the expected
number of operations would be so large that the calculation would take
literally millions of years. There is a community (Dan Bernstein
probably the mainstay of it) interested in factorisation using
hardware, and the SHARCS conferences contain the people you'd want to
talk to, but a straight ECM implementation hard-wired to factor a
single number is not all that useful. If only because the pricing of
larger FPGAs is not really competitive with the billion 64x64->128
multiplies a second that a $400 dual-core Opteron processor offers.
Tom
.
- Follow-Ups:
- Re: Xilinx 3s8000?
- From: Ron
- Re: Xilinx 3s8000?
- References:
- Xilinx 3s8000?
- From: Ron
- Re: Xilinx 3s8000?
- From: Ron
- Re: Xilinx 3s8000?
- From: Tobias Weingartner
- Re: Xilinx 3s8000?
- From: Ron
- Xilinx 3s8000?
- Prev by Date: Re: Opteron HT coprocessors
- Next by Date: Re: Anyone use Xilinx ppc405 profiling tools?
- Previous by thread: Re: Xilinx 3s8000?
- Next by thread: Re: Xilinx 3s8000?
- Index(es):
Relevant Pages
|