Re: Book Software for XC3190A?



Josh Rosen wrote:

If what you want to do is to learn how to design with FPGAs it's not
necessary to actually build something. My suggestion would be to download
a copy of Icarus Verilog (it's free) and a copy of the current Xilinx
Webpack (also free). Do design in Verilog and debug it using Icarus. Then
you can place and route it using Webpack. 21st century FPGA designers
don't spend much time in the lab debugging on the actual hardware, the
debugging is done using a Verilog simulator.

ModelSim XE starter is also a free simulator, and supports both VHDL
and Verilog. Both languages are widely used.


--
Phil Hays
(Who is leaving on a trip today to get a Xilinx badge, among other
things.)

.



Relevant Pages

  • Re: Any open source synthesis tools
    ... been using Icarus Verilog. ... tools that will start with my Verilog specification. ... VIS converts BLIF-MV to BLIF ... ABC synthesizes BLIF to a gate netlist ...
    (comp.lang.verilog)
  • Re: How do I synthesize?
    ... How to do I synthesize verilog code into a logic circuit? ... I'm doing verilog programming on Linux using the Icarus Verilog ... compiler. ...
    (comp.lang.verilog)
  • Re: icarus verilog
    ... IVI is a mediocre GUI for icarus verilog. ... It is written in Java and it is for making Java ... I have tried the eclipse verilog extension. ...
    (comp.arch.fpga)
  • Re: can anyone help me to simulate & debug this verilog code i wrote?
    ... If it's because you can't afford a Verilog Simulator license, ... I don't know of any opensource Verilog synthesis tools, ... Icarus Verilog has synthesis capabilities. ...
    (comp.lang.verilog)
  • Re: Free Verilog Simulator
    ... The reason I came out with another Verilog Simulator is because, ... >>> existing code base seems more usefull to me than creating a new code base ... > like a commercial advertisement, ...
    (comp.lang.verilog)