Re: Pull up resistors on Spartan 3 mode pins

John Larkin wrote:
On 28 Apr 2006 11:30:00 -0700, "rickman" <spamgoeshere4@xxxxxxxxx>
wrote:

People here are driving me crazy insisting that the Xilinx factory has
told them that you *MUST* tie the mode pins to either Vaux or GND.
After finding all the info in the data *** and talking with support,
it looks pretty clear to me that the S3 parts have a very stiff
internal pull up and there is no need for an external pull up of any
kind, resistor or direct connection to Vaux.

Am I misunderstanding? Why did the factory tell us before that the
mode pins *MUST* be tied to Vaux? Did we misunderstand what they were
saying?

I promise this is the last time I will ask about this. I am totally
sick of going around this loop with everyone here.


We leave them open, slave serial. Works fine.

At last, a clear, rational statement. Thanks.

I can't say that solves my problem though. I have little doubt that
there is any issue to the pullups working if you just leave them open.
The fact that they are such a low resistance seems to me to make it a
near certainty that they will pull up properly if left open.

This board is currenly ready to come out of layout with the only
remaining issues, SI on the data and address bus which we think is due
to an overly agressive TI IBIS model, it does not match the units we
can measure; and this stupid pullup resistor issue.

There is little doubt in my mind that the stiff internal pullups make
an external pullup unnecessary. I spoke with the engineer who had
spoken with the Xilinx factory person and I had trouble finishing a
sentance without being interrupted. It is very likely that she
misunderstood what Xilinx was saying to her. I expect she was told
that the pull *down* resistors needed to be tied directly to GND and/or
the distinction between the pull ups and pull downs was not made. The
fact that the data *** and app notes show direct connections to Vaux
and GND does not make the matter any more clear.

Just to be very clear that the difference between a resistor pullup and
a direct connection is not splitting hairs, we have a current part on a
board that does not work correctly because of a similar issue. The pin
has three states for setting an I2C bus address; high, low and open.
Seems the part is having trouble distinguishing the difference between
high and open with most reistor values. That data *** also did not
make it clear what value resistor was required as well as the level of
noise immunity on the input.

That engineer is working a lot of unpaid overtime at the moment. I
prefer to get this ironed out before I am done with layout and can
still make a change if *required*.

.

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