Re: Pull up resistors on Spartan 3 mode pins

rickman wrote:

People here are driving me crazy insisting that the Xilinx factory has
told them that you *MUST* tie the mode pins to either Vaux or GND.
After finding all the info in the data *** and talking with support,
it looks pretty clear to me that the S3 parts have a very stiff
internal pull up and there is no need for an external pull up of any
kind, resistor or direct connection to Vaux.

Am I misunderstanding? Why did the factory tell us before that the
mode pins *MUST* be tied to Vaux? Did we misunderstand what they were
saying?

I promise this is the last time I will ask about this. I am totally
sick of going around this loop with everyone here.

Design the PCB with options for SMD resistors, that can also be
0-Ohm shunts, and say 'define in production for valid logic levels'.
That gets you past the design review, and closes the case :)

-jg


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