Re: Assigning MGT's in sample Aurora Design
- From: "sjulhes" <t@xxxxxx>
- Date: Fri, 28 Apr 2006 10:12:47 +0200
Last time I used it, you had to choose the MGT you want among all the
proposed ones ( depending on you FPGA ) by the core generator.
The generation of the IP by core generator fills a ucf file for you.
Just include the generated ucf content to your design ucf file.
"billu" <bkamakot@xxxxxxxxx> a écrit dans le message de news:
1146205277.535391.223790@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
Hi There,
I just generated a Aurora sample design that communicates between 2
MGT's using Coregenerator. How do I configure two specific MGT's to be
used in the design (say MGT4 & MGT9). I tried to use PACE to assign
I/O's of the Aurora design to the pins on the board. But, the MGT pins
are disabled. (color coded:Brown and the legend:Gigabit serial) How do
I assign the assign the TX signals (TX_N & TX_P) and RX (RX_N & RX_P)
to the MGTs?
Thx in advance,
Billu
.
- References:
- Assigning MGT's in sample Aurora Design
- From: billu
- Assigning MGT's in sample Aurora Design
- Prev by Date: Re: Assigning MGT's in sample Aurora Design
- Next by Date: Re: Xilinx Virtex-4 OCM Usage Issues
- Previous by thread: Re: Assigning MGT's in sample Aurora Design
- Next by thread: Re: Assigning MGT's in sample Aurora Design
- Index(es):