Re: Spartan 3 chips in power up

Steve-

Thanks very much for the detailed explanation. I did not realize S3
has that much variation in pull-up/pull-down values, and the min values
could be under 2k. That does explain some of the things we've seen.
We had got this idea in our heads of "weak pull-ups" from our Spartan
II boards...

I wish S3 Rs were a uniform 10k or so, but it sounds like it's not easy
as the process continues to shrink. Is this what we can expect on
newer devices also? It seems if we used a lot of internal FPGA
pull-ups/downs instead of external ones we could significantly increase
power consumption and heat of the device.

-Jeff

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