Re: Spartan 3 chips in power up

Jeff Brower wrote:
Steve-

Until the POR is released, all I/Os not actively involved in
configuration are high-impedance. The HSWAP_EN pin controls whether or
not internal pull-ups are applied to these I/Os. When HSWAP_EN = High,
the I/Os are turned off. Also, the pull-ups connect to their
associated power rail so you won't see the effect until VCCO ramps up.

Except for the S3 errata about "if HSWAP_EN input is high, pull-up
resistors are momentarily enabled on User-I/O at end of Configuration"
which I believe only hints at the magnitude of the problem we saw on
Spartan 3s in mid-2005. On one board with ACQ revision XC3S1500-676,
the I/O pins are forced high enough to produce a 1.5V output on lines
with 1k pull-down resistors, and this condition lasted more than 100
msec prior to DONE assertion.

Spartan-3 pull-up and pull-down resistors are much stronger than in
previous FPGA families. In previous families, they were on the order
of 20-50k ohms.


On boards with revision ECQ and later parts, we don't have the problem
so it looks like it has definitely been fixed.

From the XC3S1500 errata notice ...
http://www.xilinx.com/xlnx/xweb/xil_publications_display.jsp?category=-1210888

.... it appears that the "pull-ups active during end of configuration"
issue was fixed on parts marked with either "AGQ" or "EGQ". In other
words, essentially anything built with the "GQ" process/fab code. The
errata also has diagrams indicating how to determine which device you
have. The "EGQ" is the current silicon. Table 3 in the errata notice
describes which issues were in the early and later silicon revisions.

But this brings up a question we've had about S3s for a long time:
what is the actual pull-up R value? I had heard from our local FAE
that the pull-ups are not true Rs, but a "pseudo-transistor" method is
used.

The equivalent resistance is actually specified in the data ***. See
Table 32 on page 56 in specific.
http://www.xilinx.com/bvdocs/publications/ds099.pdf

The actual measurement is a current, which equates to a resistance.
The "resistor" is as Peter described in ...
http://groups.google.com/group/comp.arch.fpga/tree/browse_frm/thread/b8a43f2bf79e9491/97ca8a520cfd0b3b?rnum=1&hl=en&_done=%2Fgroup%2Fcomp.arch.fpga%2Fbrowse_frm%2Fthread%2Fb8a43f2bf79e9491%2F6d8f92cbcdcf403f%3Flnk%3Draot%26hl%3Den%26#doc_422b86b865e6c456

For example, the equivalent pull-up "resistor" when powering a bank for
3.3V, is between 1.27k and 4.11k ohms. The equivalent pull-down
"resistor" is between 1.75k and 9.35k ohms.

---------------------------------
Steven K. Knapp
Applications Manager, Xilinx Inc.
General Products Division
Spartan-3/-3E FPGAs
http://www.xilinx.com/spartan3e
---------------------------------
The Spartan(tm)-3 Generation: The World's Lowest-Cost FPGAs.

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