Re: Spartan 3 chips in power up

Steve-

Until the POR is released, all I/Os not actively involved in
configuration are high-impedance. The HSWAP_EN pin controls whether or
not internal pull-ups are applied to these I/Os. When HSWAP_EN = High,
the I/Os are turned off. Also, the pull-ups connect to their
associated power rail so you won't see the effect until VCCO ramps up.

Except for the S3 errata about "if HSWAP_EN input is high, pull-up
resistors are momentarily enabled on User-I/O at end of Configuration"
which I believe only hints at the magnitude of the problem we saw on
Spartan 3s in mid-2005. On one board with ACQ revision XC3S1500-676,
the I/O pins are forced high enough to produce a 1.5V output on lines
with 1k pull-down resistors, and this condition lasted more than 100
msec prior to DONE assertion.

On boards with revision ECQ and later parts, we don't have the problem
so it looks like it has definitely been fixed.

But this brings up a question we've had about S3s for a long time:
what is the actual pull-up R value? I had heard from our local FAE
that the pull-ups are not true Rs, but a "pseudo-transistor" method is
used.

Thanks.

-Jeff

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