Re: for all those who believe in ASICs....

Rob wrote:
Austin,


Let those nine companies circle the drain, the plug has been pulled.


I'm really having great difficulty trying to understand why you think the ASIC/ structured ASIC market is going to die. Can you give us Xilinx's roadmap/business model that will compete?

Don't forget Xilinx have a (large) vested interest in talking down any ASIC MASK flows.


For instance: can you give me a 60k/annum pricing for a product that has a 3yr life--total pcs 180k of a 375k Gate device with 3Mbit of on chip ram and 4 PLL's? And I'll compare it to my quote from our ASIC vendor. When we started this design we were in a V2PRO30, since then our design has grown beyond the limits of this device. But since I only have pricing on the V2P30 my math will have to be based on this part. I will only give percentages as it would not be prudent for me to reveal the actual numbers.

The ASIC is 8x cheaper than the V2P part. How much more lower would the ASIC be when compared to an FPGA that could hold our current design? It is very easy to see that we save the company BIG $$ by going to an ASIC. The structured ASIC pricing was approx 4x cheaper, which is still very much cheaper than going with an FPGA.

Did you get a Hardcopy II price from Altera, or is that what you mean here ?

Do you have any current consumption ratios ?

Xilinx has decided to ignore this market, based on one of your posts--155M is too small for a 2B dollar company.

That has to be a very hard number to quantify reliably - for example, I doubt if Altera's HardCopy is in that pigenhole, they will be called FPGA's.
Altera only has to hit ~15% revenue via HardCopy, to equal that number.

Another way to approach this, is the FSA just said their members hit
$40B last year, and they are only a portion of FAB runs.
TSMC alone is presently close to $10B/yr, at the FAB end.

Everything a FAB makes, is an ASIC - a large chunk will not be reachable by FPGAs due to sheer low power, or Analog features ( tho Actel can start to argue on that last point, at least for average analog features ).

-jg



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