Re: New XC9572 decoupling newbie question :-)


Thanks I'm going to read taht right away ;-)

Benjamin Todd wrote:
I agree,

check Xilinx Application Note 73
http://direct.xilinx.com/bvdocs/appnotes/xapp073.pdf

One of the last pages outlines the good approaches for decoupling.

Ben

"PeteS" <ps@xxxxxxxxxxxxxxxxxxx> wrote in message news:1141118118.178506.30000@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx

:-) wrote:

Hey !

Cool everything fit into my XC9572 and work like a charm :-)

Now should I used some decoupling for the xc9572, I/O change at low
freq (around 2kHz ).

My question is how and how much ;-)

:-)

If you aren't switching a huge number of outputs, one 0.01uF or 0.1uF
cap per power pin (there are three) and a single bulk cap of about 1uF
should be perfectly adequate. I use that on a device connected to an
AC97 chain (clock at 12.288MHz, outbound stream at 256kb/s) and it
works just fine.

Cheers

PeteS




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