Re: PCI configuration for ML310
- From: John Williams <jwilliams@xxxxxxxxxxxxxx>
- Date: Tue, 28 Feb 2006 15:36:23 +1000
Hi Isaac,
igelado@xxxxxxxxx wrote:
On the PCI base configuration provided by Xilinx I see that they use a
IPcore called misc_logic, which seems to merge all interrupts lines
(some of them are even inverted) into a single one, but I do not
understand why should I do it. Could anybody explain me the actual
reason?
It would be great if somebody could explain me how does the whole
thing related to the interrupts from PCI devices works. At least I
would like to know which interrupt line is supposed to be asserted when
the ethernet card, the USB bridge (or whatever PCI device you prefer)
launches an interrupt, so then I can try looking into the linux kernel
code to fix the problem knowing that the interrupt line is being
asserted.
As you are seeing, the approach is to merge all of the PCI interrupt
lines into a single interrupt signal, which then feeds into the OPB
interrupt controller (OPB_INTC).
All device drivers request the same IRQ line (whichever it is on the
OPB_INTC). When any PCI device raises an interrupt, it triggers the
merged IRQ signal, and raises the interrupt. The kernel iterates
through a linked list of drivers that are all registered on that one
line. Each driver's IRQ handler queries its device, to see if it is
responsible for the interrupt condition. If so then it does its thing.
This process is documented in Chapter 4 of Bovet and Cesati's excellent
"Understanding the Linux kernel".
Doing it this way makes life a bit simpler from the kernel side, simply
knowing that all PCI devices will appear on the same IRQ line makes life
easier, at a modest increase in interrupt latency.
Regards,
John
.
- Follow-Ups:
- Re: PCI configuration for ML310
- From: igelado@xxxxxxxxx
- Re: PCI configuration for ML310
- References:
- PCI configuration for ML310
- From: igelado@xxxxxxxxx
- PCI configuration for ML310
- Prev by Date: Observed a bug in the Model sim V 6.0a
- Next by Date: Re: tricks to make large PLAs fast?
- Previous by thread: PCI configuration for ML310
- Next by thread: Re: PCI configuration for ML310
- Index(es):
Relevant Pages
|
