Re: Async Processors

Predictor wrote:
rickman wrote:
"This reminds me a bit of the way fuzzy logic was claimed to be such an
advance, but when you looked at it hard you would find little or no
real advantage. Do you see many fuzzy logic projects around anymore?"

Yes, quite a few. Bruno Di Stefano posted these 10 recently:

++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
GPS car navigation from German company NAVIGON comes to USA
(http://msmobiles.com/news.php/4766.html )
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Emerson Wins $13 Million Contract to Digitally Automate Korea's
Largest
Coal-Fired Power Plant
(http://www.automation.com/store/pdetails16264.php )
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Socket Communications Unveils Industry First Cordless Ring Scanner for
Bluetooth Enabled Mobile Computers
(http://home.businesswire.com/portal/site/google/index.jsp?ndmViewId=n...
)
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Fujitec eases bottlenecks
(http://news.enquirer.com/apps/pbcs.dll/article?AID=/20060116/BIZ01/60...
)
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
WCC Announces ELISE for Linux
(http://www.prnewswire.com/cgi-bin/stories.pl?ACCT=104&STORY=/www/stor...
)
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Bluetooth "ring scanner" works with Windows Mobile handhelds
(http://www.windowsfordevices.com/news/NS9845751870.html )
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Online Marketing: Google Enhances Filters Once Again - How will it
affect you?
(http://rismedia.com/index.php/article/articleview/13227/1/1/)
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Handwriting recognizer supports square screens, VGA
(http://www.windowsfordevices.com/news/NS2550969623.html )
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
CalliGrapher 8.2 for Mobile Devices
(http://www.digitalhomecanada.com/content/view/1007/60/ )
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
The Weather Wizards
(http://www.avweb.com/news/airman/191492-1.html )
"With the Forecast Icing Potential (FIP) tool, pilots can make
themselves aware of expected icing hazards along their route up to 12
hours in advance. FIP provides a high-tech, color, weather map and a
flight-route display of icing potential at flight levels from 3,000 to
18,000 feet.
The algorithm analyzes weather data from a vertical column perspective.
It determines the cloud top and base heights, checks for embedded cloud
layers, and identifies precipitation types. Once the likely locations
of
clouds and precipitation are found, the physical icing situation is
determined, and a fuzzy logic method is used to determine the icing
potential. Every three hours the model generates forecasts out to 12
hours. The user can select forecast times from three-, six-, nine-, and
12-hour intervals to plan safe routes of travel."
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

So that is what, perhaps 1000 to 1 ratio of fuzzy logic projects to
hard logic projects?

I have never explored fuzzy logic myself, but Bob Pease has and I read
what he had discovered about it. There were a lot of claims that were
not supported. Of course the lack of evidence of a positive does not
prove a negative. But I have seen little reason to consider fuzzy
logic a perferable alternative to any other type of design and
implementation.

Likewise, I don't see any reason to belive that async clocked logic
design has significant advantages over standard sync clocked logic
design for most applications.

There has been a lot of speculation here, a little evidence from
vendors was presented (which may or may not have been biased, we don't
have sufficient info to judge) and a lot of links of largely irrelevant
stuff was given. I stand my my analysis of the logic that was
described to me.

The main issues are two; async logic is claimed to provide more speed
and/or run with lower power consumption. Other than some very unusual
applications where it is ok to not meet deadlines and drop data, no one
has presented a way that the added speed can be used. Likewise, I have
not seen any convincing evidence of lower power than you can achieve
using sync designs if your goal is to reduce power consumption.

Consider that the example that started all this compared an async
processor that is *slower* than the sync processor they are comparing
it to. The sync processor also has little designed into it to save
power, it just runs full tilt unless you put it in a low power mode
directly when you have nothing to do. But this is not the only way to
use sync logic. You can be smart about managing clock gating. I think
there are other ways to save power in both sync and async designs, but
I won't go into that here. I want to explore that myself in an FPGA
design I am doing.

.

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