Re: Xilinx Legal

Ed McGettigan schrieb:
> The previous link that I cited only discussed a narrow issue that
> was raised to an appellate court. Try this one instead which has
> notes on the on the Software License Agreement. Altera was not
> claiming that they "owned" the bitstream only that use of the
> bitstream was restricted to Altera only devices by the license of
> the software that created it.
>
> http://www.iplawobserver.com/2005/09/using-softwares-output-to-copy-chips.html

Interesting.
They invoke the Semiconductor Chip Protection Act by stating that the
bitstream format contains information on the structure of alteras FPGA
circuits and that it therefore something like a copy of alteras circuit
layout was created.

Clear Logic seems to believe that the jury was confused about what
exactly was copied. I think that is very likely.

You are allowed to reverse engineer if you incorporate the results in an
original work. As I understand it clear logics mask is very different
from alteras in that there is no configuration logic, sram cells, etc.
There should be less then 1/6 of the transistors. Of course the
structure will be similar, but what else should "incorporate the
results" mean, clearly similarities are allowed?


Still, that ruling does not apply to using an altera bitstream in a
Xilinx FPGA oder implementing an altera bitstream in an ASIC (that is
not similar to alteras FPGA structure)

Kolja Sulimma


.

Relevant Pages

  • Re: Xilinx Legal
    ... Try this one instead which has notes on the on the Software License Agreement. ... Altera was not claiming that they "owned" the bitstream only that use of the bitstream was restricted to Altera only devices by the license of the software that created it. ...
    (comp.arch.fpga)
  • Re: Xilinx Legal
    ... the US to protect semiconductor masks and the court treated the bitstream as a mask work. ... I am generating the mask work and not altera. ... Surely Altera did not register my bitstream and did not exploit it comercially before I sent it to Clear Logic? ...
    (comp.arch.fpga)