Re: Beginner help with VHDL, Xilinx 9536XL, and ISE7.1
- From: cdsmith69@xxxxxxxxx
- Date: 8 Jan 2006 21:07:54 -0800
>My guess is that you haven't defined which pin on the
>outside of your CPLD is connected to which signal on
>the inside of your CPLD.
I almost did that, but not quite. :-)
The first time I got a project to go through the synthesize and fit I
generated a programming file, and I was about to double click on
Configure Device (iMPACT) and I suddenly thought "How does it know what
pins I want my signals on?" :-) So I looked at the ISE quick start
tutoral I had gone through a few weeks back when I first downloaded and
installed ISE and figured out how to create UCF.
.
- References:
- Beginner help with VHDL, Xilinx 9536XL, and ISE7.1
- From: cdsmith69
- Re: Beginner help with VHDL, Xilinx 9536XL, and ISE7.1
- From: James Kennedy
- Beginner help with VHDL, Xilinx 9536XL, and ISE7.1
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