Xilinx Coregen IP Customizer Causes Exception During Customization
- From: juendme@xxxxxxxxx
- Date: 29 Nov 2005 20:46:29 -0800
I'm running Xilinx ISE Webpack 7.1.04i with ISE 7.1 IP Update 3
installed on Windows XP SP2.
When I run Core Generator and try to instantiate a core (e.g. Single or
Dual Port Block Memory), there's a popup window saying 'Launching IP
Customizer', and then another popup window saying Exception
encountered. After pressing OK, status bar shows 'An Error occured
during customization' and nothing else happens.
Adding a core from the Project Navigator produces a similar result
(without popup windows)
and the status window shows
'Customizing IP...
An Error occurred during Customization.'
The same error occurs for many different cores (but not all), and there
is no apparent regularity with respect to what cores (versions, or
types of cores) cause the exception, and which don't.
It also doesn't matter which device family I am targeting (I've tried
Virtext-4 and Virtex-II Pro).
I have tried running CoreGen with limited memory (As suggested at
http://www.xilinx.com/xlnx/xil_ans_display.jsp?BV_UseBVCookie=yes&getPagePath=20708
, but that doesn't help).
Has anyone encountered a similar problem, or knows of any workarounds?
Regards,
Fred
.
- Prev by Date: Re: async fifo design
- Next by Date: Re: first time managing a project
- Previous by thread: Q-bus or Unibus bus transactions in FPGA?
- Next by thread: Clock problem? Altera Stratix-II ES and MP
- Index(es):