The reason of implementation of morphological operator in FPGA
- From: "TMU" <m.hajirahimi@xxxxxxxxx>
- Date: 29 Nov 2005 05:18:57 -0800
hi
I have studied some papers of implementation of morphological operator
in FPGA and ASIC.
I want to know the reason of implementation of morphological operator
in FPGA.
Does FPGA implementation use only in test of our design?
and what is the meaning of realtime processing? (the required speed of
chip)
can anyone help me?
thank
best regard
.
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