Re: Altera Pin not used in Quartus project but drives logic

Monica wrote:

We are confused how FPGA drives logic on the pins that we donot use in
design.Are we missing something?

By default, some versions of quartus route signals
through unused pins to save internal resources.

Can anybody please give us a hint how to solve this problem?

One way is to declare and describe exactly what
you expect these pins to do:
 a <= '0';b <= '0'; c <= '0';...
Or
 c <= a and b and ...;

The other way is to change the synthesis
default setting for unused pins.

    -- Mike Treseler
.

References:
- Altera Pin not used in Quartus project but drives logic
  - From: Monica