Re: FPGA C Compiler on sourceforge.net (TMCC derivative)

Robin Bruce wrote:

<snip> 

But if the intent is to take
high-level C developed by a software guy and have it map to hardware as
well as it runs on a DSP, well, I just think you'll leave a lot of FPGA
peformance on the table.



Who said that's what we're trying to do? We're talking about high-level
languages not so we can compile legacy code. We're doing it so we can
rapidly infer reliable hardware using a more concise expression than
that achieved using HDLs while paying a minimal price in lost potential
performance.


Which has a lot in common with the ASM-HLL debates on microcontrollers.

The best solutions will come from a mix of tools
- but the sad reality is marketing dept drive is to push the hot new thing, as a silver bullet, and any suggestions or examples of mixing HLL/HDL, might be seen as admitting that their hot-new-thing is not actually the universal new tool....

There is another, more recent shift in FPGA's, which means
a 'Sea of DSP' deployed in the FPGA, and that is missing from
this link:
"Survey of C-based Application Mapping Tools for Reconfigurable Computing"
http://klabs.org/mapld05/program_sessions/session_c.html

 The HLL -> HDL path, misses the alternative of HLL -> FPGA Running HLL
amd the best tool set, will be one that allows a softer migration
between Opcodes and Registers.

 The next generation FPGA will be interesting to watch, as we are
steadily getting more coarse & complex blocks, in BlockRAM and
DSP-able blocks, with each release.
 This may outflank the efforts to create C -> registers ?

-jg

.

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