Re: Best FPGA for floating point performance
- From: Ray Andraka <ray@xxxxxxxxxxx>
- Date: Tue, 11 Oct 2005 23:39:54 -0400
glen herrmannsfeldt wrote:
Glen, for this application, I'd argue that the floating point might be cheaper if he needs the dynamic range, especially if fixed point pushes him to wider than 35x35 multipliers. a floating point multiplier has very little extra compared to fixed point, and you can get away with a considerably smaller multiply. He may find that he can get away with a 17 bit significand with floating point (in which case a single multiplier per node in the array is needed), or at worst 4 multipliers for single precision. On the other hand, if his dynamic range demands more than 35 bit multiplication if converted to fixed point, then he's got 9 embedded multipliers per multiply, plus adders to combine the partials. Generally speaking, using floating point for multiplication and division is cheaper than using fixed point. The opposite is true of addition and subtraction. In this case however, his addition has to essentially be done in fixed point, so he can do the conversion to fixed using denorms, do the row add and then renormalize the sum. In any event, I don't see any problems getting this matrix multiply into a spartan3 as a floating point implementation.Marc Battyani wrote:
(snip)
In fact I'm not sure that full IEEE floating point accuracy is needed. For
sure single precision is not enough but probably double precision is not
really needed. The problem is that people who write the algorithms do it in
C(++) using double precision floats and they use double precision libraries,
etc. So it's not obvious to see what precision is really needed. After all
in an FPGA we can use the exact number of bit needed. (In fact it is even
possible that a fixed point format could work)
If fixed point will do it, even significantly wider than floating
point, it is likely the best way. Floating point add is a lot more expensive than fixed point. The difference is much smaller for
multiply and divide, not counting any overhead specific to full IEEE implementations.
-- glen
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--Ray Andraka, P.E.
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