Re: PPC405 32 bit aligned accesses



If the data cache is in write-back mode and is turned on for a certain memory region you will not see byte, halfword or word transactions. All you will see are cache-line aligned cache-line transactions.

Hi,
Hmm, that's a shame, It'd be nice to save the I/Os I'd need for byte
masking.


Exactly what we thought ;O)

Only a good idea for a limited set of applications.
Anyway, before doing anything in the DDR2 memory you need to turn the data cache on for the address region where it is mapped. You can do that with a small program running from BRAM and the jump to the entry point of the application in the DDR2 memory. Here is some code that will do that for running Linux later on:


#include "xcache_l.h"

int main()
{
  void (*f)(void);

  // enable I/D cache for first 128 MB
  XCache_EnableICache(0x80000000);
  XCache_EnableDCache(0x80000000);

  f = (void*) 0x400000;   // entry point of the Linux kernel bootloader
  (*f)();

  /* we should never get here */
  return -1;
}



Ok, I see what you mean... the plan is to use Montavista Linux on the card and I am not sure how easy would be to add such service. I'll check with the software guys.

It is very likely that you will need to patch your card and bring the byte masks out. Linux uses the MMU to set up cacheable regions, ie. it will/may put descriptors (networks, etc.) into uncacheable areas. Unless you plan to modify the Linux kernel heavily it is very unlikely that your system will work. You can boot Linux though from a RAM disk to least get started.


Also, make sure that the compiler knows that the memory region is
cachable. In an embedded world it could be that all addresses default to
address space with side effects. In that case the compiler has no choice
but to perform access to data of type byte as individual byte accesses.

That has nothing to do with the compiler, i.e. the compiler does know nothing about caches. The programmer is responsible to maintain memory coherency.



Again, please consider to patch your board. IMHO, it's the fastest way to make progress.


- Peter

.



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